Electrostatic Discharge Expert in Circuit Design
An electrostatic discharge expert with circuit design experience was needed for a patent infringement case involving the protection of integrated circuits from electrostatic discharge, or ESD. Both parties were involved in the development of semiconductor technology for use in microelectronics manufacturing. Specifically, the case dealt with flash memory technology used in digital cameras, cell phones, and other consumer electronics.
IMS ExpertServices sought an expert in electrostatic discharge prevention with particular expertise in integrated circuit design and flash memory technology. The client requested an expert with strong electrical engineering credentials and experience working in the semiconductor industry.
For over 12 years, this expert has been involved in the field of electrostatic discharge phenomenon through publications, inventions, education and leadership. His most current projects at IBM included work on MOSFET drain engineering, hot electrons, line width control, and electrostatic discharge, or ESD. He was responsible for semiconductor process development, on-chip electrostatic discharge protection design, electrostatic discharge innovations, CAD software design, and strategic planning. This expert received his M.S. in electrical engineering from MIT. In addition, he received an M.S. in engineering physics and a Ph.D. in electrical engineering. IMS Reference #4989994
This wafer fabrication expert's microelectronics experience has included defining electrostatic discharge test chips down to 0.09µm, characterizing electrostatic discharge test structures, defining electrostatic discharge networks, supervising failure analysis of parts that fail an electrostatic discharge or latch-up specification, defining solutions for parts that fail electrostatic discharge, and working with design engineers to preempt ESD problems. He received his M.S. in electrical engineering with a specialization in solid state electronics from the University of California, Berkeley. He has been a member of the Electrostatic Discharge Association since 1991. IMS Reference #4990034
This expert in electrostatic discharge and integrated circuit design has spent 26 years in the semiconductor industry. He has been a key contributor in microelectronics product development for device and integrated circuit design and in reliability and product qualification testing services for electrostatic discharge. He received his B.S. in engineering and his M.S. in electrical engineering. He has provided consulting, deposition and trial testimony services in more than ten cases requiring him to perform prior art research, preparation of patent applications, evaluation and testimony on patent form and function. He has opined on chip function and design, wafer fabrication processing, process techniques, process architecture and fabrication process equipment. IMS Reference #4991555